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libsle4442
0.2-5
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Bit banging driver to SLE4442. More...

Go to the source code of this file.
Macros | |
| #define | SLE_PORT PORTA |
| #define | SLE_PIN PINA |
| #define | SLE_DDR DDRA |
| #define | SLE_PRESENT 3 |
| #define | SLE_RST 0 |
| #define | SLE_CK 1 |
| #define | SLE_IO 2 |
| #define | OUT 2 |
| #define | IN 3 |
| #define | ck_delay() _delay_us(25) |
| #define | ck_delay_front() _delay_us(4) |
| #define | ck_delay_reset() _delay_us(50) |
| #define | set_ck_1 SLE_PORT |= (1<<SLE_CK) |
| #define | set_ck_0 SLE_PORT &= ~(1<<SLE_CK) |
| #define | set_rst_1 SLE_PORT |= (1<<SLE_RST) |
| #define | set_rst_0 SLE_PORT &= ~(1<<SLE_RST) |
Functions | |
| void | ck_pulse (void) |
| void | set_io (const uint8_t io) |
| uint8_t | read_byte (void) |
| void | send_byte (uint8_t byte) |
| void | send_rst (uint8_t *atr) |
| void | send_cmd (const uint8_t control, const uint8_t address, const uint8_t data) |
| uint8_t | processing (void) |
Bit banging driver to SLE4442.
Low level bit banging driver to read and write to Sle4442 card.
| #define ck_delay | ( | ) | _delay_us(25) |
The delay in usec for half of the wave.
example:
10Khz = 100usec.
20Khz = 50usec, half wave = 25 usec.
Remeber delay is only HALF of the freq. 20Khz total
| #define ck_delay_front | ( | ) | _delay_us(4) |
The MIN delay for a front phase between fronts of ck and/or rst and/or IO.
| #define ck_delay_reset | ( | ) | _delay_us(50) |
delay reset = 1.
| #define IN 3 |
a simple macro to define IN as 3.
| #define OUT 2 |
a simple macro to define OUT as 2.
| #define SLE_CK 1 |
clock pin of the card.
| #define SLE_DDR DDRA |
The data direction register to handle the port's line direction.
| #define SLE_IO 2 |
I/O pin of the card.
| #define SLE_PIN PINA |
The input port definition where the card is connected to.
| #define SLE_PORT PORTA |
Port the card's reader is conneted to.
| #define SLE_PRESENT 3 |
PIN connected to the present card switch.
| #define SLE_RST 0 |
PIN connected to the reset pin of the card.
| void ck_pulse | ( | void | ) |
Single clock pulse.
This function generates a single clock cycle onto the clock line.
| uint8_t processing | ( | void | ) |
Wait for the card to process the command.
| uint8_t read_byte | ( | void | ) |
Read a byte from IO line.
The function geneates 8 clock pulse cycle and on each of them a bit is read from the IO line.
| void send_byte | ( | uint8_t | byte | ) |
Write a byte to the IO line.
The function write a byte a singe bit at a time, the bit is written on the 0 phase of the ck line, see datasheet.
| byte | the byte to be sent. |
| void send_cmd | ( | const uint8_t | control, |
| const uint8_t | address, | ||
| const uint8_t | data | ||
| ) |
Send a complete command sequence.
| control | the control byte. |
| address | the address byte. |
| data | the data byte. |
| void send_rst | ( | uint8_t * | atr | ) |
Send the reset (rst) sequence to the card.
See datasheet for details on the RST sequence.
| *atr | ptr to mem area where this function stores the 4 byte ATR returned after the RST. |
| void set_io | ( | const uint8_t | io | ) |
Set's I/O line to one of: IN, OUT, 0 or 1.
IN: The port is in input, the subsequent call with: 0 - Disable internal pull-up resistor. 1 - Enable internal pull-up resistor.
OUT: The port in in output mode, the subsequent call with: 0 - Line is logic 0 (GND). 1 - Line is logic 1 (+5V).
| io | can be 0, 1, IN, OUT |
1.8.13